Commit 4520abf1 authored by Noel Gordon's avatar Noel Gordon Committed by Commit Bot

[zlib] Make insert string a little less #ifdef-ie

Remove one level of #ifdef indent to make that part of the code easier
to read. Change the accelerated routine name to end in _simd as is our
way elsewhere in chromium zlib.

Minor: adjust the comments around the performance claims, and move the
important comments re CHROMIUM_ZLIB_NO_CASTAGNOLI into that block.

Bug: 1032721
Change-Id: Icb4044f3b87277d67f0ff004ac70813af0a91f5b
Reviewed-on: https://chromium-review.googlesource.com/c/chromium/src/+/2148893Reviewed-by: default avatarChris Blume <cblume@chromium.org>
Reviewed-by: default avatarAdenilson Cavalcanti <cavalcantii@chromium.org>
Commit-Queue: Noel Gordon <noel@chromium.org>
Cr-Commit-Position: refs/heads/master@{#760408}
parent 138e51aa
...@@ -4,45 +4,47 @@ ...@@ -4,45 +4,47 @@
* Use of this source code is governed by a BSD-style license that can be * Use of this source code is governed by a BSD-style license that can be
* found in the Chromium source repository LICENSE file. * found in the Chromium source repository LICENSE file.
*/ */
#ifdef _MSC_VER
#if defined(_MSC_VER)
#define INLINE __inline #define INLINE __inline
#else #else
#define INLINE inline #define INLINE inline
#endif #endif
#include "cpu_features.h" #include "cpu_features.h"
/* Optimized insert_string block */
#if defined(CRC32_SIMD_SSE42_PCLMUL) || defined(CRC32_ARMV8_CRC32)
#define TARGET_CPU_WITH_CRC
// clang-format off // clang-format off
#if defined(CRC32_SIMD_SSE42_PCLMUL) #if defined(CRC32_SIMD_SSE42_PCLMUL)
/* Required to make MSVC bot build pass. */ #include <smmintrin.h> /* Required to make MSVC bot build pass. */
#include <smmintrin.h>
#if defined(__GNUC__) || defined(__clang__) #if defined(__clang__) || defined(__GNUC__)
#undef TARGET_CPU_WITH_CRC
#define TARGET_CPU_WITH_CRC __attribute__((target("sse4.2"))) #define TARGET_CPU_WITH_CRC __attribute__((target("sse4.2")))
#else
#define TARGET_CPU_WITH_CRC
#endif #endif
#define _cpu_crc32_u32 _mm_crc32_u32 #define _cpu_crc32_u32 _mm_crc32_u32
#elif defined(CRC32_ARMV8_CRC32) #elif defined(CRC32_ARMV8_CRC32)
#if defined(__clang__) #if defined(__clang__)
#undef TARGET_CPU_WITH_CRC
#define __crc32cw __builtin_arm_crc32cw #define __crc32cw __builtin_arm_crc32cw
#endif #endif
#define _cpu_crc32_u32 __crc32cw
#if defined(__aarch64__) #if defined(__aarch64__)
#define TARGET_CPU_WITH_CRC __attribute__((target("crc"))) #define TARGET_CPU_WITH_CRC __attribute__((target("crc")))
#else // !defined(__aarch64__) #else // !defined(__aarch64__)
#define TARGET_CPU_WITH_CRC __attribute__((target("armv8-a,crc"))) #define TARGET_CPU_WITH_CRC __attribute__((target("armv8-a,crc")))
#endif // defined(__aarch64__) #endif // defined(__aarch64__)
#define _cpu_crc32_u32 __crc32cw
#endif #endif
// clang-format on // clang-format on
#if defined(TARGET_CPU_WITH_CRC)
TARGET_CPU_WITH_CRC TARGET_CPU_WITH_CRC
local INLINE Pos insert_string_optimized(deflate_state* const s, local INLINE Pos insert_string_simd(deflate_state* const s, const Pos str) {
const Pos str) {
Pos ret; Pos ret;
unsigned *ip, val, h = 0; unsigned *ip, val, h = 0;
...@@ -64,7 +66,8 @@ local INLINE Pos insert_string_optimized(deflate_state* const s, ...@@ -64,7 +66,8 @@ local INLINE Pos insert_string_optimized(deflate_state* const s,
s->prev[str & s->w_mask] = ret; s->prev[str & s->w_mask] = ret;
return ret; return ret;
} }
#endif /* Optimized insert_string block */
#endif // TARGET_CPU_WITH_CRC
/* =========================================================================== /* ===========================================================================
* Update a hash value with the given input byte * Update a hash value with the given input byte
...@@ -99,24 +102,22 @@ local INLINE Pos insert_string_c(deflate_state* const s, const Pos str) { ...@@ -99,24 +102,22 @@ local INLINE Pos insert_string_c(deflate_state* const s, const Pos str) {
} }
local INLINE Pos insert_string(deflate_state* const s, const Pos str) { local INLINE Pos insert_string(deflate_state* const s, const Pos str) {
/* String dictionary insertion: faster symbol hashing has a positive impact /* insert_string_simd string dictionary insertion: this SIMD symbol hashing
* on data compression speeds (around 20% on Intel and 36% on Arm Cortex big * significantly improves data compression speed.
* cores).
* A misfeature is that the generated compressed output will differ from
* vanilla zlib (even though it is still valid 'DEFLATE-d' content).
* *
* We offer here a way to disable the optimization if there is the expectation * Note: the generated compressed output is a valid DEFLATE stream but will
* that compressed content should match when compared to vanilla zlib. * differ from vanilla zlib output ...
*/ */
#if !defined(CHROMIUM_ZLIB_NO_CASTAGNOLI) #if defined(CHROMIUM_ZLIB_NO_CASTAGNOLI)
/* TODO(cavalcantii): unify CPU features code. */ /* ... so this build-time option can used to disable the SIMD symbol hasher
#if defined(CRC32_ARMV8_CRC32) * if matching vanilla zlib DEFLATE output is required.
if (arm_cpu_enable_crc32) */ (;) /* FALLTHOUGH */
return insert_string_optimized(s, str); #elif defined(TARGET_CPU_WITH_CRC) && defined(CRC32_SIMD_SSE42_PCLMUL)
#elif defined(CRC32_SIMD_SSE42_PCLMUL)
if (x86_cpu_enable_simd) if (x86_cpu_enable_simd)
return insert_string_optimized(s, str); return insert_string_simd(s, str);
#endif #elif defined(TARGET_CPU_WITH_CRC) && defined(CRC32_ARMV8_CRC32)
if (arm_cpu_enable_crc32)
return insert_string_simd(s, str);
#endif #endif
return insert_string_c(s, str); return insert_string_c(s, str);
} }
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